Perceptia launches ultra-high performance PLL IP!
| Home - Mixed-Signal IP And IC Design Services | |
| Perceptia is based in Scotts Valley, California, with a design center in Sydney, Australia. Perceptia provides bleeding-edge RF and mixed-signal IC design services and IP, for frequencies up to 70-GHz and focusing on advanced foundry processes, including 40 and 32-nm. | |
| Perceptia design activities includes: (1) PLL, SerDes and timing cell designs, and (2) custom mixed-signal physical implementation. To control technical risks it uses rigid signoff processes. To control schedule risks, Perceptia uses advanced EDA technology. Perceptia brings its own design environment, or if required uses yours. | |
| PLL, SerDes and Timing Cells | |
| Our timing cell design group delivers front-to-back design services for DSP-based PLLs and regular PLLs, SerDes, Clock Generators, DDR2/3, VCOs, Frequency Synthesizers, etc. Our team is specialized in spread spectrum and fractional-N PLLs, and low-jitter, low-noise design. Perceptia is currently developing a DeepSub™ 10-Gbps SerDes that will fit a wide range of applications, including PCIe, XAUI, SATA, EPON, GPON, 10G-EPON. Macros are verified in a design environment compatible with yours. | |
| Custom Mixed-Signal Physical Implementation | |
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To realize the highest density and/or highest performance for digital and mixed-signal designs,
Perceptia delivers full custom or structured custom implementation services. While your own team may consist of system design, logic design, logic verification and analog design experts, Our detailed approach will be based on your implementation objectives, the technical intricacies of your design, mutual responsibilites, data handoffs, data acceptance criteria, design reviews, and schedules. | |